Microcircuit devices, commonly referred to as “integrated circuits,” are used in a variety of products, from automobiles to microwaves to personal computers. Designing and fabricating integrated circuits involves many steps; which has become known as a ‘design flow,’ the particular steps of which are highly dependent on the type of microcircuit, the complexity, the design team, and the integrated circuit fabricator or foundry. Several steps are common to all design flows: first a design specification is modeled logically, typically in a hardware design language (HDL). Software and hardware “tools” then verify the design at various stages of the design flow by running software simulators and/or hardware emulators, and errors are corrected in the design are corrected.
After the accuracy of the logical design is confirmed, the logical design is converted into design data by synthesis software. The design data, often called a “netlist”, represents the specific electronic devices that will achieve the desired logical result, such as transistors, resistors, and capacitors, and their interconnections. Preliminary estimates of timing may also be made at this stage, using an assumed characteristic speed for each device. This “netlist” can be viewed as corresponding to the level of representation displayed in typical circuit diagrams.
Once the relationships between circuit elements have been established, the design is again transformed into physical design data describing specific geometric elements. These geometric elements define the shapes that will be created in various materials to form the circuit elements. Custom layout editors, such as Mentor Graphics' IC Station or Cadence's Virtuoso are commonly used for this task. Automated place and route tools can also be used to define the physical layouts, especially of wires that will be used to interconnect logical elements.
Thus, the physical design data represents the patterns that will be written onto the masks used to fabricate the desired microcircuit device, typically by photolithographic processes. Each layer of the integrated circuit has a corresponding layer representation in the physical database, and the geometric shapes described by the data in that layer representation define the relative locations of the circuit elements. For example, the shapes for the layer representation of an implant layer define the regions where doping will occur; the line shapes in the layer representation of an interconnect layer define the locations of the metal wires to connect elements, etc. A manufacturing facility or “fab” will then manufacture the integrated circuits using the masks. Each fab specifies its own physical design parameters for compliance with their process, equipment, and techniques.
As the importance of microcircuit devices grow, designers and manufacturers continue to improve these devices. Each year, for example, microcircuit device manufacturers develop new techniques that allow microcircuit devices, such as programmable microprocessors, to be more complex and smaller in size. Microprocessors are now manufactured with over 50 million transistors, many with dimensions of only 90 nm. As microcircuit devices become more complex and their circuit elements smaller, they also become more difficult to correctly manufacture. For example, a conventional microcircuit device may have millions of different connections, and even a single broken or shorted connection may cause the operation of the microcircuit to fail.
Increasing the manufacturing yield of an integrated circuit by reducing the number of defects created during the manufacturing process traditionally has been the responsibility of the fabs that manufacture the integrated circuits. Typically, a fab will identify defects after an initial manufacturing run, and then make changes in the manufacturing process or equipment for subsequent manufacturing runs in the hope of avoiding the identified defects and improving the manufacturing yield of the integrated circuit. The complexity of the design and manufacturing process for modern integrated circuits constructed at nanometer geometries has led to a dramatic rise in the number of defects that occur only as a result of the interaction between the design and the process, however. As a result, it has become increasingly difficult for a fab to identify changes in the process or equipment that will reduce these new types of defects. In many cases these new defect types are too difficult or costly to even detect during the manufacturing process.